Why do eGaN FETs conduct in the reverse (S-D) direction with about 1.5V?

Could you clarify this point? If that is the case, why are the Gate Threshold Voltage and Source-Drain Forward Voltage (with source = gate = 0V, hence plot of Gate-Drain) listed as separate in the data sheets?

In the GaN Transistors for Efficient Power Conversion book (Pg 38, Fig. 2.13), the EPC2045 body-diode forward drop versus source-drain current is given. Comparing that to the datasheet EPC2045 conduction curve versus VGS, it is slightly different…