There’s plenty of resources and design guides and specs on thermal resistance between junction and case and ambient etc. and thermal design regarding heatsinking, but what about the thermal resistance between drain and source?
I have an application where I’m switching a load (50% duty cycle, ~1MHz) that will get hot and needs to be managed. Right now I’m using a high side switch so the load’s negative terminal can be connected directly to a large copper pour + vias to a heatsunk ground for thermal management. I’d like to switch with a low-side GaN switch for higher efficiency and no bootstrapping, but I’m afraid that the load will no longer have a good thermal path to heatsunk ground.
Is there any available data on heat transfer from drain to source when switch is ON vs OFF?