Long time MOS first time GaN here.
Working on a uC controlled DC/DC Buck at 80V with the EPC23104 part. On the GND of the EPC23104 we have a 2mOhm current sense resistor. I have been told that the bounce from the inductance of the shunt can cause a ground shift large enough to cause unexpected logic behaviour between the uC logic levels and the EPC23104 logic levels. Isolating the digital logic is a way to fix this and referencing the isolator to the top of the shunt fixes the issue. I understand the nuances here but wont truly know the inductance until the system is built. I have noticed this isnt done on dev kits like → EPC9151.
My question is if this is nessacary or not since i dont really see it in the dev kits. It does at a lot of cost.
Hi, and welcome to the world of GaN. uC and EPC23104 are a good combination, with the built-in gate driver with shoot-through protection. Regarding the current sense resistor, this can be a difficult situation, it can depend on the max output current, and as you noted the ground shift due to inductance of the current sense resistor. Sometimes it is OK (low current, low inductance). Perhaps the safest way to do it, and perhaps easier for the processor (sawtooth wave, vs. discontinuous sensing of bottom-only FET) is the current sense resistor in series with the power inductor. And a small current amplifier. As you mention, one example is in evaluation board EPC9151, another is in evaluation board EPC9177, see pages 1 and 4.
To your question as to whether or not this is needed: you’d need analysis and testing to determine if a low-side resistor is adequate for your specific situation (current, sense resistor, layout, logic input levels, etc.).