EPC2367 footprint

Designing with GaN FETs and ICs
1

Hello,

I’ve designed the EPC2367 footprint according to the datasheet (as shown in the image). I’ve circled a few places that look odd to me, like the stencil being larger than the soldermask defined pad (SMD) and sometimes even sitting outside the copper are, but wanted to confirm it is indeed intentional. If a PCB assembly house sees this footprint, will they tend to pull the stencil back within the SMD area? Seems like a note is needed in the PCB assembly drawing to ensure they don’t do that.

Thanks,

Narek

EPC2367 footprint
EPC2367 footprint1888×1218 374 KB

2

Hello Narek,

The stencil geometry shown in the EPC2367 datasheet is intentional. EPC uses a solder-mask-defined pad with oversized stencil apertures to increase solder volume and ensure proper wetting and reliability, even if the paste extends slightly beyond the copper or mask opening. This is not an error and should not be modified. This app note can be a useful resource if you’d like more information: https://epc-co.com/epc/portals/0/epc/documents/application-notes/AN029%20Solder%20Stencil%20Design%20Guidelines%20for%20Reliable%20Assembly%20of%20PQFN%20GaN.pdf

Best,

Daniel Carlson

3

Understood. Thank you very much, Daniel!

Narek