How do I lay out the eGaN devices in my high performance power conversion circuit?
Because eGaN FETs and ICs are so fast, additional care must be taken to lay out your circuit with minimum parasitic inductance. EPC has developed optimal layout techniques that can be found in the whitepaper “Optimizing PCB Layout with eGaN FETs” ) and the video “How To GaN 05: Design Basics – Layout”