Can anyone let me know what the exposed material is that is visible on the EPC2302? (i.e. the metal used for the shiny top surface).
The EPC2302 is QFN GaN FET with exposed top. This means what you are seeing is the back of the die itself. EPC GaN FETs use a Si wafer as a starting substrate and add the GaN layers to it. What you see is the Si substrate: this allows the most efficient path to extract heat…
Thank you, that’s really useful. If you could expand for me if possible (mech eng here so fets aren’t my specialty!) when it talks about the thermal transfer to the “case” in the data sheet, which part of the device is ”case” referring to?
in the datasheet we provide 2 numbers for Rth:
- junction to case top: this the shiny part that you would see when the parts is assembled on a PCB, so where you can connect a heatsink through a TIM
- junction to board (case bottom): this is the part of the package that has the electrical connections to the PCB
I hope this helps…
Could you possibly email me? We are working with a very large number of these components and I have a query that I can’t put into this forum.