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SOA data clarification
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1
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35
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February 9, 2023
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GaN's anti-parallel intrinsic diode
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1
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30
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February 9, 2023
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Switching characteristics of GaN
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2
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42
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February 9, 2023
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High voltage clearance requirements
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1
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100
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October 4, 2022
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GaN FETs failure mode in over voltage and over temperature conditions
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1
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146
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August 25, 2022
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How do GaN FETs fail at over current conditions
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1
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112
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August 25, 2022
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Solder Mask Defined pads vs NSMD
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2
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280
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May 10, 2022
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Is it advisable to put CM chokes on PI type filters at the input of the gate driver?
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1
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133
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February 28, 2022
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Can eGaN FETs be paralleled? If so what are the key elements for a good design?
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1
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139
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February 28, 2022
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I'm entertaining utilizing the EPC2206 in a new design. Please elaborate/clarify what is meant by "It is recommended to have on-Cu trace PCB vias" on page 6 of the data sheet
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1
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129
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February 27, 2022
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What are common issues EPC has encountered in PCB design and assembly?
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1
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98
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February 27, 2022
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What considerations need to be made in regard to stencil design?
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1
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91
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February 27, 2022
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Can a via be placed directly under a bump?
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1
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96
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February 27, 2022
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Do I need to add insulation between eGaN FET and the heatsink?
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1
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150
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February 14, 2022
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What is the best way to evaluate EPC’s devices without designing a custom PCB?
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1
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150
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February 13, 2022
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