|
What lead free (PbF) solder pastes has EPC used?
|
|
1
|
517
|
February 27, 2022
|
|
Can a via be placed directly under a bump?
|
|
1
|
777
|
February 27, 2022
|
|
What is the recommended reflow for EPC die?
|
|
1
|
573
|
February 27, 2022
|
|
What is the composition of the lead free (PbF) solder bump and underbump (UBM) metals for EPC die?
|
|
1
|
452
|
February 27, 2022
|
|
How do I assemble EPC’s enhancement mode GaN devices and do these parts require any special steps during the manufacturing process?
|
|
1
|
521
|
February 27, 2022
|
|
Are GaN FETs prone to small area overheating?
|
|
1
|
645
|
February 27, 2022
|
|
Is there an optimum or recommended junction temperature for EPC2045?
|
|
1
|
726
|
February 27, 2022
|
|
Do EPC GaN FETs require a negative gate drive voltage?
|
|
1
|
1214
|
February 27, 2022
|
|
What is the longest short circuit time for GaN devices?
|
|
1
|
594
|
February 27, 2022
|
|
Can EPC GaN FETs (with packaging or not) have a working temperature between 250°C-300°C
|
|
1
|
526
|
February 27, 2022
|
|
Do I need a parallel external diode for reverse diode protection?
|
|
1
|
1188
|
February 27, 2022
|
|
Is there is an internal diode protecting the VGS?
|
|
1
|
850
|
February 27, 2022
|
|
For the EPC device maximum range of Vgs is from -4 V ~ 6 V, is this range a continuous value or transient value?
|
|
1
|
722
|
February 27, 2022
|
|
Where can I get a materials declaration sheet for your products?
|
|
1
|
556
|
February 27, 2022
|
|
What are the limitations on the gate input for EPC’s eGaN devices?
|
|
1
|
625
|
February 14, 2022
|
|
How do I lay out the eGaN devices in my high-performance power conversion circuit?
|
|
1
|
574
|
February 14, 2022
|
|
Does the GaN have a body diode? If so how does it compare with the Silicon MOSFETs with respect to forward voltage drop and reverse recovery characteristics?
|
|
1
|
3994
|
February 14, 2022
|
|
How does the "body diode" forward drop change if the gate is driven to a negative voltage?
|
|
1
|
857
|
February 14, 2022
|
|
How do I test EPC’s enhancement mode GaN devices?
|
|
1
|
499
|
February 14, 2022
|
|
What is the temperature range for extended application?
|
|
1
|
589
|
February 14, 2022
|
|
What is the temperature dependence of Gate-Source Threshold?
|
|
1
|
564
|
February 14, 2022
|
|
Are EPC devices Avalanche rated?
|
|
1
|
498
|
February 14, 2022
|
|
Where can I find information on the thermal resistance of eGaN devices?
|
|
1
|
509
|
February 14, 2022
|
|
How does EPC handle the “Miller Effect”?
|
|
1
|
1187
|
February 14, 2022
|
|
Do I need to add insulation between eGaN FET and the heatsink?
|
|
1
|
708
|
February 14, 2022
|
|
Is the back (top) of the device isolated from the device itself?
|
|
1
|
577
|
February 14, 2022
|
|
How do EPC’s enhancement mode transistors compare with power MOSFETs?
|
|
1
|
505
|
February 14, 2022
|
|
Are there any plans for EPC to integrate the gate driver with the power FET, as it would reduce the gate loop inductance even further?
|
|
1
|
556
|
February 14, 2022
|
|
Does EPC have plans to produce GaN diodes?
|
|
1
|
625
|
February 13, 2022
|
|
Is EPC ISO certified?
|
|
1
|
421
|
February 13, 2022
|